High Speed Radix-2 Butterfly Structure Using Novel Wallace Multipler

Abstract

In any Central Processing Unit (CPU) the crucial components are Arithmetic and Logic Unit (ALU). ALU can perform different operation like addition, subtraction, multiplication etc. In this thesis addition and multiplication plays an important role because adders and multipliers are the basic building blocks of any Digital Signal Processing applications. Firstly, in this work adder is used for addition of numbers but it also perform some arithmetic operations. In adders the basic buildings blocks are Half adder and Full adder because they are used for constructing complex adders like Ripple Carry Adder, Carry Select Adder etc. First analyzed efficient adder and used this efficient adder for implementation of modified Carry Increment adder. This modified adder used in many Signal Processing application and increases the speed of the circuit because nowadays delay optimization and power optimization become a very challenging problem with the increase of the portable devices. Secondly, after adders the crucial component is multiplier. In multipliers the basic block for reducing partial product is adder. The efficient adder used in the multiplier for increasing the speed of circuit and used the circuit in an optimized way. For constructing an efficient multiplier different architecture are proposed so to design an efficient multiplier. A modified multiplier is proposed by using efficient multiplier with efficient adder so, to improve the overall performance of the circuit.