Design and Performance Evaluation of PCle on Different FPGA

Abstract

This B.Tech project is based on DESIGN AND PERFORMANCE EVALUATION OF PCIe ON DIFFERENT FPGA. Today’s computer systems demand high performing interconnects that can help in providing high definition graphics, full momentum videos, high bw networking etc. PCIe (peripheral component interconnect Express) came out as the dominant model for interconnecting all the elements of present day, high performing computer systems. In our work we have designed PCIe model, worked on the idea of different lanes and how they affect the energy consumption. Also energy efficient PCIe will increase the lifetime of a computer system and PCIe with low delay & latency would raise the efficiency of the system. Three distinct FPGA are considered and the design is realized on the three ICs & we find out the most energy saving architecture & also find the design that will provide high performance among the three designs taken under discussion. There is 46.75% depletion in latency when we shift our PCIe design from 28 nanometer technology based on seven series architecture to 20 nanometer technology based on ultra scale architecture.