Please use this identifier to cite or link to this item:
http://ir.juit.ac.in:8080/jspui/jspui/handle/123456789/11911| Title: | Design of Network on Chip Simulator and a Novel Networking Topology |
| Authors: | Shrivastava, Mehboob Kumar, Avinash Agarwal, Yarash Bhardwaj, Deepankar Srivastava, Prashant Sehgal, Vivek [Guided by] Sharma, Rohit [Guided by] |
| Keywords: | Network topology Systems on chip Network simulation |
| Issue Date: | 2009 |
| Publisher: | Jaypee University of Information Technology, Solan, H.P. |
| Description: | Enrollment No. 051013, 051028, 051040, 051041, 051045 |
| URI: | http://ir.juit.ac.in:8080/jspui/jspui/handle/123456789/11911 |
| Appears in Collections: | B.Tech. Project Reports |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Design of Network-on-Chip Simulator and a Novel Networking Topology.pdf | 66.76 MB | Adobe PDF | View/Open |
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